SmartSiCTM : Engineered SiC for high-voltage power applications

時間：15:50 - 16:20

語言： 英

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  Walter Schwarzenbach

   

  PhD.

  Soitec

   

   

  講師簡介

   

  Walter Schwarzenbach (m) has received an Engineer Degree in Physics from the Swiss Federal Institute of Technology in Lausanne in 1994, and a PhD Degree in Physics from the University of Grenoble in 1999. He joined Soitec in 2000 as process development engineer then became project leader in charge of SmartCutTM process industrialization for several 300mm Partially-Depleted SOI substrate generations. From 2009 to 2018, he was in charge as Product Leader of Fully-Depleted SOI, Imager SOI and 2.5D - 3D materials definition and introduction. Since 2019, as part of the Innovation team, he is Technology Manager for SmartCut SiC engineered substrates, said SmartSiCTM. He is author or co-author of more than 50 articles in international refereed journals and conferences and more than 30 patents.