Vice President
Powertech Technology Inc.
Advanced Packaging Solutions and Applications with FOPLP Technology
Education:
Ph. D. Power mechanical department, National Tsing Hua University
Experience:
Advanced Packaging Operation AVP of Powertech Technology Inc.
Advanced Packaging BU head of Powertech Technology Inc.
Board Director of Greatek Electronics Inc.
As the need for a smarter future, powered by automotive, AI, 5G, and IoT, combined with the advancement of semiconductor wafer node is still strong. However, advanced wafer node with higher I/O density which means the I/O pitch and density of substrate can hardly keep up with that of IC's. In order to bridge the ever widening gap between IC and substrate, we have to turn to the advanced packaging for bridging the two.<br>The term "Fan-out packaging" became a hot topic for the advanced packaging. While many of the players focus on the wafer form Fan-out, PTI developed panel form which provides more flexibilities and manufacturing efficiency to meet customer's demand. The solution can cover a wide array of application ranging from small I/O device to complex multi chiplet integration, either heterogeneously or homogeneously. Although FOPLP (Fan-out Panel Level Package) technology has many challenges, PTI still rolled into mass production. Nowadays we are engaging with many new applications.